? 2001 fairchild semiconductor corporation ds500648 www.fairchildsemi.com september 2001 revised september 2001 74alvch245 low voltage bidirectional transceiver with bushold 74alvch245 low voltage bidirectional transceiver with bushold general description the alvch245 contains eight non-inverting bidirectional buffers with 3-state outputs and is intended for bus ori- ented applications. the t/r input determines the direction of data flow. the oe input disables both the a and b ports by placing them in a high impedance state. the alvch245 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or float- ing data inputs at a valid logic level. the 74alvch245 is designed for low voltage (1.65v to 3.6v) v cc applications. the 74alvch245 is fabricated with an advanced cmos technology to achieve high-speed operation while main- taining low cmos power dissipation. features 1.65v-3.6v v cc supply operation bushold on data inputs eliminates the need for external pull-up/pull-down resistors t pd 3.6 ns max for 3.0v to 3.6v v cc 4.2 ns max for 2.3v to 2.7v v cc 6 ns max for 1.65v to 1.95v v cc uses patented quiet series noise/emi reduction circuitry latchup conforms to jedec jed78 esd performance: human body model > 2000v machine model > 200v ordering code: devices also available in tape and reel. specify by appending the suffix letter ?x? to the ordering code. logic symbol pin descriptions quiet series ? is a trademark of fairchild semiconductor corporation. order number package number package description 74alvch245wm m20b 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide 74alvch245mtc mtc20 20-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide pin names description oe output enable input (active low) t/r transmit/receive input a 0 ? a 7 side a bushold inputs or 3-state outputs b 0 ? b 7 side b bushold inputs or 3-state outputs
www.fairchildsemi.com 2 74alvch245 connection diagram truth table h = high voltage level l = low voltage level x = immaterial z = high impedance logic diagram inputs outputs oe t/r l l bus b 0 ? b 7 data to bus a 0 ? a 7 l h bus a 0 ? a 7 data to bus b 0 ? b 7 h x high z state on a 0 ? a 7 , b 0 ? b 7
3 www.fairchildsemi.com 74alvch245 absolute maximum ratings (note 1) recommended operating conditions (note 3) note 1: the absolute maximum ratings are those values beyond which the safety of the device cannot be guaranteed. the device should not be operated at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum rat- ings. the ? recommended operating conditions ? table will define the condi- tions for actual device operation. note 2: i o absolute maximum rating must be observed, limited to 4.6v. note 3: floating or unused control inputs must be held high or low. dc electrical characteristics supply voltage (v cc ) ? 0.5v to + 4.6v dc input voltage (v i ) ? 0.5v to 4.6v output voltage (v o ) (note 2) ? 0.5v to v cc + 0.5v dc input diode current (i ik ) v i < 0v ? 50 ma dc output diode current (i ok ) v o < 0v ? 50 ma dc output source/sink current (i oh /i ol ) 50 ma dc v cc or gnd current per supply pin (i cc or gnd) 100 ma storage temperature range (t stg ) ? 65 c to + 150 c power supply operating 1.65v to 3.6v input voltage (v i )0v to v cc output voltage (v o )0v to v cc free air operating temperature (t a ) ? 40 c to + 85 c minimum input edge rate ( ? t/ ? v) v in = 0.8v to 2.0v, v cc = 3.0v 10 ns/v symbol parameter conditions v cc min max units (v) v ih high level input voltage 1.65 - 1.95 0.65 x v cc v 2.3 - 2.7 1.7 2.7 - 3.6 2.0 v il low level input voltage 1.65 - 1.95 0.35 x v cc v 2.3 - 2.7 0.7 2.7 - 3.6 0.8 v oh high level output voltage i oh = ? 100 a 1.65 - 3.6 v cc - 0.2 v i oh = ? 4 ma 1.65 1.2 i oh = ? 6 ma 2.3 2.0 i oh = ? 12 ma 2.3 1.7 2.7 2.2 3.0 2.4 i oh = ? 24 ma 3.0 2 v ol low level output voltage i ol = 100 a 1.65 - 3.6 0.2 v i ol = 4 ma 1.65 0.45 i ol = 6 ma 2.3 0.4 i ol = 12 ma 2.3 0.7 2.7 0.4 i ol = 24 ma 3.0 i oh high level output current 1.65 ? 4 ma 2.3 ? 12 2.7 ? 12 3.0 ? 24 i ol low level output current 1.65 4 ma 2.3 12 2.7 12 324 i i input leakage current 0 v i 3.6v 3.6 5.0 a i i(hold) bushold input minimum v in = 0.58v 1.65 25 a drive hold current v in = 1.07v 1.65 ? 25 v in = 0.7v 2.3 45 v in = 1.7v 2.3 ? 45 v in = 0.8v 3.0 75 v in = 2.0v 3.0 ? 75 0 < v o 3.6v 3.6 500
www.fairchildsemi.com 4 74alvch245 dc electrical characteristics (continued) ac electrical characteristics capacitance symbol parameter conditions v cc min max units (v) i oz 3-state output leakage 0 v o 3.6v 3.6 10 a i cc quiescent supply current v i = v cc or gnd, i o = 0 3.6 10 a ? i cc increase in i cc per input v ih = v cc ? 0.6v 3 - 3.6 750 a symbol parameter t a = ? 40 c to + 85 c, r l = 500 ? units c l = 50 pf c l = 30 pf v cc = 3.3v 0.3v v cc = 2.7v v cc = 2.5v 0.2v v cc = 1.8v 0.15v min max min max min max min max t phl , t plh propagation delay 1.3 3.6 4.2 1.0 3.7 1.5 6.0 ns t pzl , t pzh output enable time 1.6 5.5 6.3 2.0 6.0 2.9 8.6 ns t plz , t phz output disable time 1.7 5.5 5.3 0.8 4.8 1.5 8.0 ns symbol parameter conditions t a = + 25 c units v cc typical c in input capacitance control v i = 0v or v cc 3.3 4.5 pf c i/o input/output capacitance a or b ports v i = 0v or v cc 3.3 12 pf c pd power dissipation capacitance outputs enabled f = 10 mhz, c l = 0 pf 3.3 31 pf 2.5 28 1.8 25 outputs disabled f = 10 mhz, c l = 50 pf 3.3 0 2.5 0 1.8 0
5 www.fairchildsemi.com 74alvch245 ac loading and waveforms figure 1. ac test circuit figure 2. waveform for inverting and non-inverting functions figure 3. 3-state output high enable and disable times for low voltage logic figure 4. 3-state output low enable and disable times for low voltage logic test switch t plh , t phl open t pzl , t plz 6v at v cc = 3.3 0.3v; v cc x 2 at v cc = 2.5v 0.2v; 1.8v 0.15v t pzh , t phz gnd symbol v cc 3.3v 0.3v 2.5v 0.2v 1.8v 0.15v v mi 1.5v v cc /2 v cc /2 v mo 1.5v v cc /2 v cc /2 v x v ol + 0.3v v ol + 0.15v v ol + 0.15v v y v oh ? 0.3v v oh ? 0.15v v oh ? 0.15v
www.fairchildsemi.com 6 74alvch245 physical dimensions inches (millimeters) unless otherwise noted 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide package number m20b
7 www.fairchildsemi.com 74alvch245 low voltage bidirectional transceiver with bushold physical dimensions inches (millimeters) unless otherwise noted (continued) 20-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide package number mtc20 fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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